1. Field of the Invention
The present invention relates to a method for fabricating a semiconductor device and more particularly, to a method for fabricating a semiconductor device, using an improved process for forming a contact plug in connection with the formation of a bitline or a capacitor in the semiconductor device provide a more stable bitline or capacitor structure.
2. Background of the Related Art
A first prior art method for fabricating a semiconductor device will be explained with reference to FIGS. 1A and 1B.
Referring to FIG. 1A, an interlayer insulating film 4 of BPSG (borophosphosilicate glass) is formed on a semiconductor substrate 1 having a bitline and a wordline formed thereon, and planarized by CMP (Chemical Mechanical Polishing). Then, a PE-TEOS (Plasma Enhanced tetra-ethyl ortho silicate glass) film 5 is plasma deposited on the interlayer insulating film 4, and an etch stopper film 6 is deposited thereon. Next, by using a storage electrode contact mask (not shown) as an etch mask to expose the portion of the structure to be used as a storage electrode contact to the semiconductor substrate 1, the etch stopper film 6, the PE-TEOS film 5, and the interlayer insulating film 4 are etched, to form a storage electrode contact hole 7. Then, a polysilicon layer (not shown) for forming a contact plug is deposited on an entire exposed surface, including the storage electrode contact hole 7, and etched back until the surface of the etch stopper film 6 is exposed, to form a contact plug 8. Then, a core oxide film (not shown) is formed over the entire surface. By using a storage electrode mask (not shown) as an etch mask for exposing a portion to be used as a storage electrode, the core oxide film is etched to form a core oxide film pattern 9 which exposes the contact plug 8. Then, a polysilicon layer 10a for forming a storage electrode is formed on the entire surface, and subjected to a CMP process to remove the upper portion of the layer to form a cylindrical storage electrode 10b. 
This prior art method for fabricating a semiconductor device is, however, subject to problems caused by lifting as a result of the small contact area between the contact plug and the cylindrical storage electrode, or the collapse of the capacitor owing to the burden from the height of the capacitor. Further, etch residue at the boundary of the contact plug remaining from the etch back of the contact plug also increases contact resistance.
In order to address the problems of this prior art method, an alternative prior art method has been suggested.
Referring to FIG. 2A, an interlayer insulating film 14 of BPSG or the like is formed on a semiconductor substrate 11 having a bitline and a wordline formed thereon, and planarized by CMP. Then, nitride etch stopper film 15 is deposited on the planarized interlayer insulating film, and a PE-TEOS film 16 is plasma deposited thereon. By using a storage electrode contact mask (not shown) as an etch mask, the PE-TEOS film 16, the etch stopper film 15, and the interlayer insulating film 14 are etched in succession, to form a storage electrode contact hole 17. Then, a polysilicon layer (not shown) for forming the contact plug is deposited on the entire exposed surface including the storage electrode contact hole 17, and etched back until the surface of the PE-TEOS film 16 is exposed, to form a contact plug 18. Next, a core oxide film (not shown) is formed on the entire surface, and, using a storage electrode mask as an etch mask for exposing the portion of the structure that will be used as a storage electrode, the core oxide film is etched, to form a core oxide film pattern 19. In this instance, a portion of the PE-TEOS film 16 is removed during the formation of the core oxide film pattern 19, allowing a portion of the contact plug 18 project above the remaining PE-TEOS film 6. Then, a polysilicon layer 20a for forming a storage electrode is formed on the entire exposed surface and the upper portion of the polysilicon layer 20a is then removed by CMP, to form a cylindrical storage electrode 20b. 
Thus, is alternative prior art method may form a more stable structure than produced by the first prior art method. However, the problem of etch residue at the boundary of the contact plug has remained and, there have been problems associated with the structure. One structural problem is that the plug tends to break the H-beam form, a problem that becomes worse following a MPS (meta-stable silicate glass) process. This problem could be addressed somewhat by reducing the burden caused by the capacitor height to achieve the required structural improvement. But the trend is that capacitor heights are increasing to increase capacitance improve refresh performance, making it apparent that structural improvement can not be a fundamental or lasting solution to this problem.
FIG. 3 illustrates a second alternative prior art method for fabricating a semiconductor device, wherein a method for forming a bitline is shown.
Referring to FIG. 3, a first interlayer insulating film 24 of BPSG or the like is formed on a semiconductor substrate 21 having a wordline formed thereon, and a etch stopper film 25 is plasma deposited on the first interlayer insulating film 24. A PE-TEOS film 26 is formed on the etch stopper film 25. Next, using a bitline contact mask (not shown) as an etch mask to expose the portion of the structure that will be a bitline contact, the PE-TEOS film 26, the etch stopper film 25, and the first interlayer insulating film 24 are selectively removed, to form a first bitline contact hole 27. Next, a first polysilicon layer (not shown) is deposited on an entire surface including the first bitline contact hole 27, and etched back, to form a first contact plug 28. Then, a second interlayer insulating film 29 is formed on an entire exposed surface, and, using a bitline contact mask (not shown) as an etch mask for exposing the portion of the structure that will be a bitline contact in the first contact plug 28, the second interlayer insulating film 29 is etched, to form a second bitline contact hole 31. A second polysilicon layer (not shown) is then formed on the entire exposed surface including the second bitline contact hole 31, and etched back, to form a second contact plug 30 in contact with the first contact plug 28. Next, a third polysilicon layer (not shown) is formed on an entire exposed surface, and selectively removed, to form a bitline 32 in contact with the second contact plug 30.
Thus, in the second alternative prior art method, the first contact plug can provide a stable support to the second contact plug unless the height of the second contact plug is elongated unavoidably, resulting in lifting of the second plug, or shifting of the bitline.
Accordingly, the present invention is directed to a method for fabricating a semiconductor device that substantially overcomes one or more of the problems resulting from the limitations and disadvantages of the prior art methods.
An object of the present invention is to provide a method for forming a contact in a semiconductor device then can provide a secure and stable cell structure that will prevent lifting of a cell capacitor in a dip out of a core oxide film, and increase cylindrical area of the capacitor to improve self refresh characteristics.
Another object of the present invention is to provide a method for forming a contact in a semiconductor device, which can reduce the etch back process, which is one of the most difficult processes in the present fabrication processes, to thereby simplify the fabrication process.
Still another object of the present invention is to provide a method for forming a contact in a semiconductor device, which can reduce the resistance caused by residual material from the etch back used in forming the contact plug.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, the method for fabricating a semiconductor device includes the steps of (1) forming an interlayer insulating film, an etch stopper film, and a PE-TEOS film in succession on a semiconductor substrate having a wordline and a bitline formed thereon, (2) by using a storage electrode contact mask as an etch mask, etching the PE-TEOS film, the etch stopper film, and the interlayer insulating film, to form a storage electrode contact hole, (3) forming a polysilicon layer for a contact plug on an entire surface, and etched back, to form a storage electrode contact plug stuffing the storage electrode contact hole, (4) forming a core oxide film pattern on an entire surface to expose a portion to be a storage electrode, (5) removing the storage electrode contact plug to a desired depth by using an etch selectivity of the core oxide film pattern and the PE-TEOS film over the storage contact plug, to form a recess, and (6) forming a cylindrical storage electrode in contact with the storage electrode contact plug through the recess.
In another aspect of the present invention, there is provided a method for fabricating a semiconductor device, including the steps of (1) forming an interlayer insulating film, an etch stopper film, and a PE-TEOS film in succession on a semiconductor substrate having a wordline and a bitline formed thereon, (2) by using a storage electrode contact mask as an etch mask, etching the PE-TEOS film, the etch stopper film, and the interlayer insulating film, to form a storage electrode contact hole, (3) forming a polysilicon layer for a contact plug on an entire surface, (4) etching back the polysilicon layer for a contact plug, to form a recess of a required depth in the storage electrode contact hole and, at the same time, to form a storage electrode contact plug stuffing an interlayer insulating film portion of the storage electrode contact hole, (5) forming a core oxide film pattern on an entire surface to expose a portion to be a storage electrode, and (6) forming a cylindrical storage electrode in contact with the storage electrode contact plug through the recess.
In further aspect of the present invention, there is provided a method for fabricating a semiconductor device, including the steps of (1) forming a first interlayer insulating film, an etch stopper film, and a PE-TEOS film on a semiconductor substrate having a wordline formed thereon, (2) by using a bitline contact mask as an etch mask, etching the PE-TEOS film, the etch stopper film, and the first interlayer insulating film, to form a first bitline contact hole, (3) forming a first polysilicon layer on an entire surface, (4) etching back the first polysilicon layer, to form a first bitline contact plug, wherein a portion above the first bitline contact plug is etched by a required thickness to form recess that exposes a portion larger than the first bitline contact hole, (5) forming on the entire surface a second interlayer insulating film having a second bitline contact hole exposing the first bitline contact plug, (6) forming on the entire surface, and then etching back a second polysilicon layer, to form a second bitline contact plug in contact with the first bitline contact plug, and (7) forming a bitline in contact with the second bitline contact plug.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.